
Hardware Software Co-design of a Multimedia Soc Platform
by Chen, Sao-jie; Lin, Guang-Huei; Hsiung, Pao-ann; Hu, Yu Hen-
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Summary
Table of Contents
Foreword | |
Preface | |
Acknowledgments | |
List of Figures | |
List of Tables | |
Introduction | |
Design Consideration | |
Platform-Based Design | |
System Modeling | |
Video Coding | |
Image Processing | |
Cryptography | |
Digital Communication | |
Multimedia Instruction Set Design | |
System Level Design | |
Abstraction Levels | |
Algorithm Level Verification | |
Transaction Level Modeling | |
System Level Development Tools | |
Embedded Processor Design | |
Specific Instruction-Set | |
Data Level Parallelism | |
Instruction Level Parallelism | |
Thread Level Parallelism | |
Parallel Compiler | |
Vectorization | |
Simdization | |
ILP Scheduling | |
Threading | |
Compiler Technique | |
Compiler Infrastructures | |
Implementation OF H.264 ON PLX | |
Instruction Set Decision for H. 264 | |
Hardware/Software Partitioning | |
Untimed Virtual Prototype | |
Timed SystemC Modeling | |
PLX Chip Design | |
Real-Time Operating System For Plx | |
PRRP Scheduler | |
Memory Management | |
Communication and Synchronization Primitives | |
Multimedia Applications in RTOS for PLX | |
Application Development Environment | |
Experimental Results | |
Conclusion | |
References | |
Table of Contents provided by Publisher. All Rights Reserved. |
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