|
|
ix | |
|
|
xiv | |
Preface |
|
xv | |
Introduction and Background |
|
1 | (26) |
|
|
3 | (8) |
|
|
4 | (4) |
|
Research Overview and Objective |
|
|
8 | (1) |
|
|
9 | (2) |
|
System Level Design of Embedded Systems |
|
|
11 | (16) |
|
The Application Domain, and Design Tools |
|
|
11 | (1) |
|
|
11 | (2) |
|
System Level Design Validation of Embedded Systems |
|
|
13 | (1) |
|
Co-simulation Validation Framework |
|
|
14 | (4) |
|
Function Architecture Co-design Methodology |
|
|
18 | (5) |
|
Reactive System Co-synthesis |
|
|
23 | (4) |
Function / Architecture Optimization and Co-design |
|
27 | (148) |
|
|
29 | (20) |
|
|
33 | (5) |
|
Novel Intermediate Design Representation |
|
|
38 | (9) |
|
|
47 | (2) |
|
|
49 | (36) |
|
|
49 | (2) |
|
Mathematical Framework for Control and Data Flow Analysis |
|
|
51 | (14) |
|
The FFG Data Flow and Control Optimization Algorithm |
|
|
65 | (9) |
|
Properties of the FFG Optimization Algorithm |
|
|
74 | (5) |
|
Tree vs. Shared DAG Form of the FFG |
|
|
79 | (1) |
|
The Backdrop: Related Work in Optimization |
|
|
80 | (1) |
|
|
81 | (4) |
|
Function / Architecture Optimizations |
|
|
85 | (36) |
|
Function / Architecture Representation: AFFG |
|
|
86 | (1) |
|
Function Architecture Co-design in the Macro-Architecture |
|
|
87 | (1) |
|
Operation Motion in the AFFG |
|
|
88 | (13) |
|
Other Constraint-Driven Optimization Techniques |
|
|
101 | (1) |
|
Optimizing the Function to be Mapped onto the Macro Architecture |
|
|
102 | (11) |
|
Function Architecture Co-design in the Micro-Architecture |
|
|
113 | (3) |
|
|
116 | (5) |
|
Architectural Optimizations |
|
|
121 | (26) |
|
Target Architectural Organization |
|
|
121 | (5) |
|
CFSM Network Architecture: SHIFT |
|
|
126 | (1) |
|
|
126 | (6) |
|
Mapping the AFFG onto SHIFT |
|
|
132 | (3) |
|
Architecture Dependent Optimizations |
|
|
135 | (10) |
|
|
145 | (2) |
|
Hardware/Software Co-Synthesis and Estimation |
|
|
147 | (28) |
|
Hardware/Software Co-synthesis |
|
|
147 | (1) |
|
Software CFSM Representation: The S-graph |
|
|
148 | (2) |
|
Polis Approach to Software Synthesis |
|
|
150 | (4) |
|
Polis Approach to Hardware Synthesis |
|
|
154 | (1) |
|
Optimization and Co-design Guiding Co-Synthesis |
|
|
154 | (1) |
|
The Real Time Operating System |
|
|
155 | (3) |
|
Interfacing Polis to Commercial RTOSs |
|
|
158 | (5) |
|
|
163 | (2) |
|
Measuring the Final Implementation Cost |
|
|
165 | (1) |
|
|
166 | (8) |
|
|
174 | (1) |
Overall Co-design Flow, Results, Conclusions, and the Future |
|
175 | (42) |
|
Function / Architecture Optimization and Co-Design Flow |
|
|
177 | (12) |
|
|
177 | (3) |
|
|
180 | (3) |
|
A Comprehensive Function Architecture Co-design and Optimization Flow |
|
|
183 | (2) |
|
|
185 | (4) |
|
|
189 | (22) |
|
A Communications Domain Application Example: An ATM Server |
|
|
190 | (10) |
|
An Automotive Dashboard Controller |
|
|
200 | (3) |
|
Results on Data-rich Control Designs |
|
|
203 | (8) |
|
Conclusions and Future Research Opportunities |
|
|
211 | (6) |
Index |
|
217 | (18) |
References |
|
235 | (10) |
C-Like Intermediate Format (Clif) for Design Representation |
|
245 | |